[Gllug] Re: Dual core AMDs

Robert Newson ran at bullet3.fsnet.co.uk
Thu Jul 14 22:14:03 UTC 2005


Christian Smith wrote:

...
> Ah, but it did save a branch instruction, which was at least 2 (3?) cycles
> per loop. There was non of this modern pipelining technology back then,
> you know(*).

According to my book, on a Z80 a JR cc takes 12/7 cycles - 12 if branch 
taken, 7 if not.
On a 6502 a Bcc takes 2/3(/4) cycles - 2 if not taken, 3 if taken (+ an 
extra cycle if a page boundary crossed IIRC).

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