[Gllug] Re: Dual core AMDs

[Rich Walker]

Christopher Hunter <chrisehunter at blueyonder.co.uk> writes:

> On Tuesday 12 Jul 2005 08:19, John Hearns wrote:
>
>> I'll leave others to answer that question.
>> The RISC/CISC wars are over, and I think the answer is that CISC has
>> won, with elements of RISC, as you say.

"Highly-compressed instruction streams that are  cracked open by
random-array-of-gates decoders into multiple RISC-like streams" has won.


> Certainly not!  I use CISC for my desktop boxen and laptops, but almost ALL my 
> application specific design is for RISC (mostly PICs and ATMEL).  In most of 
> my applications, a PIC is more than "man enough" for the job.

The PIC is *not* a RISC CPU!

(a) when it was originally designed, RISC was barely known about as a
    concept (Okay, the IBM 801 may have been built, but people outside
    IBM didn't know about that until later)

(b) Every new generation of the PIC adds a whole number of extra
    instructions to the ISA to support various stuff. The instructions
    are *not* picked according to the RISC methodology...

cheers, Rich. [who has debugged a lot of 6502, ARM, and PIC code, but
has never needed to read x86 assembler... ]


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