Dual core AMDs (was Re: [Gllug] Recording Ogg streams?)

Chris Bell chrisbell at overview.demon.co.uk
Mon Jul 11 23:17:59 UTC 2005


On Mon 11 Jul, John Hearns wrote:
> 
> On Mon, 2005-07-11 at 22:12 +0100, John Hearns wrote:
> 
> 
> I should explain why dual-cores are a good thing.
> You get maybe 90-95% gain in performance (will depend very much
> on the application. Do your own benchmarking, that is a wetted finger
> raised in the wind figure). Same space, not much more demands on
> power and air conditioning loads.
> As lots of of customers have limited space for clusters, and can't keep 
> running in more 100 amp feeds, then dual cores will make sense for
> departmental sized clusters.
> Also a dual system will be a small 4-way SMP machine, and  I think you
> will see more people running 4-way jobs on these.
> 
> Hate to boast, but we're also due to ship eight-CPU systems to a
> university soon. Can take up to 128 gigs of RAM (if you can
> afford it!). So the day of the small SMP system is coming again.
> Such systems are costly if compared to PC server prices, but are pocket
> change if compared to old-school big iron.
> 
   I have been using a "Strong ARM" based RISC PC for many years. It uses
very little power, has a relatively low clock speed, but out-performs many
later well known systems because of the efficient commands and design.
   The design philosophy was that for a complex instruction set computer
(CISC), perhaps 30 percent of the commands were used for 70 percent of the
time, so only provide the well used commands but allow them to be enhanced
by adding more options, combining associated commands into a single clocked
command. More complex commands can be emulated in software by the efficient
RISC processor. It does not need, and does not waste effort maintaining, a
long pipeline.
   By contrast, the Intel Pentium II onwards use a RISC (reduced instruction
set computer) core running at extremely high speed to emulate the CISC 486
and Pentium I. It uses a long pipeline, which has to be cleared and refilled
frequently.
   Is the trend now towards ever more complex CISC architectures, or RISC
chips designed for efficiency? We hear about overheating problems, but are
we just running unneccessary hardware?
   I can understand the need for specialist chips for number crunching, but
what about server applications?

-- 
Chris Bell

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