[Nottingham] [Misc] RISC and CISC and now: VISC ... A new modern day Transmeta?...

[Martin]

Folks,

Here's an interesting idea to break out of the stale developments
hitting a performance plateau for x86-style CPUs...


CPU startup firm offers chip-level virtual machines

Well-funded startup proposes chips that run virtualization at the CPU
level, not the OS.

https://www.itworld.com/article/2838623/cpu-startup-firm-offers-chip-level-virtual-machines.html


See also:


VISC CPU ‘virtual core’ design emerges: Could this be the conceptual
computing breakthrough we’ve been waiting for?

http://www.extremetech.com/extreme/192858-visc-cpu-virtual-core-design-emerges-could-this-be-the-conceptual-breakthrough-weve-been-waiting-for



That also reminds me of the old "Dataflow" projects:

Dataflow architecture
https://en.wikipedia.org/wiki/Dataflow_architecture

BMDFM (Binary Modular Dataflow Machine)
https://en.wikipedia.org/wiki/BMDFM

The Manchester dataflow machine
https://www.sciencedirect.com/science/article/pii/0167739X85900093

The Manchester Prototype Dataflow Computer
https://www.semanticscholar.org/paper/The-Manchester-Prototype-Dataflow-Computer-Gurd-Kirkham/9de493d227b0c747348488a5a5deb695bc3f1b77

Dataflow Machine Architecture
http://web.cecs.pdx.edu/~alaa/courses/ece588/winter2009/papers/veen_acmcs_1986.pdf

The TERAFLUX Project: Exploiting the DataFlow Paradigm
in Next Generation Teradevices
http://apt.cs.manchester.ac.uk/people/dgoodman/papers/dsd2013.pdf



New tech and new money and new impetus to redevelop early ideas from the
dawn of computing?

Here's watching with interest :-)


Cheers,
Martin